#ifndef REG_RTC_TYPE_H_
#define REG_RTC_TYPE_H_
#include <stdint.h>

typedef struct
{
    volatile uint32_t CTRL;
    volatile uint32_t WKUP;
    volatile uint32_t TIME;
    volatile uint32_t CAL;
    volatile uint32_t ALTIME;
    volatile uint32_t ALCAL;
    volatile uint32_t ALEN;
    volatile uint32_t TRIG;
    volatile uint32_t IER;
    volatile uint32_t IDR;
    volatile uint32_t IVS;
    volatile uint32_t RIF;
    volatile uint32_t IFM;
    volatile uint32_t ICR;
    volatile uint32_t STA;
    volatile uint32_t BKEN;
}reg_rtc_t;

enum RTC_REG_CTRL_FIELD
{
    RTC_CTRL_MODE_MASK = 0x40000000,
    RTC_CTRL_MODE_POS = 30,
    RTC_CTRL_CALVAL_MASK = 0x3f000000,
    RTC_CTRL_CALVAL_POS = 24,
    RTC_CTRL_SCALE_MASK = 0x00ff0000,
    RTC_CTRL_SCALE_POS = 16,
    RTC_CTRL_PSCALE_MASK = 0X00007f00,
    RTC_CTRL_PSCALE_POS = 8,
    RTC_CTRL_CYCLE_MASK = 0X00000020,
    RTC_CTRL_CYCLE_POS = 5,
    RTC_CTRL_CALIB_MASK = 0X00000010,
    RTC_CTRL_CALIB_POS = 4,
    RTC_CTRL_CKSEL_MASK = 0x0000000C,
    RTC_CTRL_CKSEL_POS = 2,
    RTC_CTRL_RTCEN_MASK = 0x00000001,
    RTC_CTRL_RTCEN_POS = 0,
};

enum RTC_REG_WKUP_FIELD
{
    RTC_WKUP_WKSCAL_MASK= 0x3C000000,
    RTC_WKUP_WKSCAL_POS = 26,
    RTC_WKUP_WKSEL_MASK = 0x03000000,
    RTC_WKUP_WKSEL_POS = 24,
    RTC_WKUP_WKCAL_MASK = 0x00ffffff,
    RTC_WKUP_WKCAL_POS = 0,
};

enum RTC_REG_TIME_FIELD
{
    RTC_TIME_WEEK_MASK = 0x07000000,
    RTC_TIME_WEEK_POS = 24,
    RTC_TIME_HOUR_T_MASK = 0x00300000,
    RTC_TIME_HOUR_T_POS = 20,
    RTC_TIME_HOUR_U_MASK = 0x000f0000,
    RTC_TIME_HOUR_U_POS = 16,
	RTC_TIME_MIN_T_MASK = 0x00007000,
    RTC_TIME_MIN_T_POS = 12,
	RTC_TIME_MIN_U_MASK = 0x00000f00,
    RTC_TIME_MIN_U_POS = 8,
	RTC_TIME_SEC_T_MASK = 0x00000070,
    RTC_TIME_SEC_T_POS = 4,
	RTC_TIME_SEC_U_MASK = 0x0000000f,
    RTC_TIME_SEC_U_POS = 0,
};

enum RTC_REG_CAL_FIELD
{    
    RTC_CAL_YEAR_T_MASK = 0x00f00000,
    RTC_CAL_YEAR_T_POS = 20,
    RTC_CAL_YEAR_U_MASK = 0x000f0000,
    RTC_CAL_YEAR_U_POS = 16,
    RTC_CAL_MON_T_MASK = 0x00001000,
    RTC_CAL_MON_T_POS = 12,
    RTC_CAL_MON_U_MASK = 0x00000f00,
    RTC_CAL_MON_U_POS = 8,
    RTC_CAL_DATE_T_MASK = 0x00000030,
    RTC_CAL_DATE_T_POS = 4,
    RTC_CAL_DATE_U_MASK = 0x0000000f,
    RTC_CAL_DATE_U_POS = 0,
};

enum RTC_REG_ALTIME_FIELD
{
    RTC_ALTIME_WEEK_MASK = 0x07000000,
    RTC_ALTIME_WEEK_POS = 24,
    RTC_ALTIME_HOUR_T_MASK = 0x00300000,
    RTC_ALTIME_HOUR_T_POS = 20,
    RTC_ALTIME_HOUR_U_MASK = 0x000f0000,
    RTC_ALTIME_HOUR_U_POS = 16,
	RTC_ALTIME_MIN_T_MASK = 0x00007000,
    RTC_ALTIME_MIN_T_POS = 12,
	RTC_ALTIME_MIN_U_MASK = 0x00000f00,
    RTC_ALTIME_MIN_U_POS = 8,
	RTC_ALTIME_SEC_T_MASK = 0x00000070,
    RTC_ALTIME_SEC_T_POS = 4,
	RTC_ALTIME_SEC_U_MASK = 0x0000000f,
    RTC_ALTIME_SEC_U_POS = 0,
};

enum RTC_REG_ALCAL_FIELD
{    
    RTC_ALCAL_YEAR_T_MASK = 0x00f00000,
    RTC_ALCAL_YEAR_T_POS = 20,
    RTC_ALCAL_YEAR_U_MASK = 0x000f0000,
    RTC_ALCAL_YEAR_U_POS = 16,
    RTC_ALCAL_MON_T_MASK = 0x00001000,
    RTC_ALCAL_MON_T_POS = 12,
    RTC_ALCAL_MON_U_MASK = 0x00000f00,
    RTC_ALCAL_MON_U_POS = 8,
    RTC_ALCAL_DATE_T_MASK = 0x00000030,
    RTC_ALCAL_DATE_T_POS = 4,
    RTC_ALCAL_DATE_U_MASK = 0x0000000f,
    RTC_ALCAL_DATE_U_POS = 0,
};

enum RTC_REG_ALEN_FIELD
{
    RTC_ALEN_YEAR_MASK = 0x00000040,
    RTC_ALEN_YEAR_POS = 6,
    RTC_ALEN_MONTH_MASK = 0x00000020,
    RTC_ALEN_MONTH_POS = 5,
    RTC_ALEN_DATE_MASK = 0x000000010,
    RTC_ALEN_DATE_POS = 4,
    RTC_ALEN_WEEK_MASK = 0x00000008,
    RTC_ALEN_WEEK_POS = 3,
    RTC_ALEN_HOUR_MASK = 0x00000004,
    RTC_ALEN_HOUR_POS = 2,
    RTC_ALEN_MIN_MASK = 0x00000002,
    RTC_ALEN_MIN_POS = 1,
	RTC_ALEN_SEC_MASK = 0x00000001,
    RTC_ALEN_SEC_POS = 0,
};

enum RTC_REG_TRIG_FIELD
{
    RTC_TRIG_WKTM_MASK = 0x00010000,
    RTC_TRIG_WKTM_POS = 16,
    RTC_TRIG_F1HZ_MASK = 0x00008000,
    RTC_TRIG_F1HZ_POS = 15,
	RTC_TRIG_RYEAR_MASK = 0x00004000,
    RTC_TRIG_RYEAR_POS = 14,
	RTC_TRIG_RMON_MASK = 0x00002000,
    RTC_TRIG_RMON_POS = 13,
	RTC_TRIG_RDATE_MASK = 0x00001000,
    RTC_TRIG_RDAYE_POS = 12,
    RTC_TRIG_RWEEK_MASK = 0x00000800,
    RTC_TRIG_RWEEK_POS = 11,
    RTC_TRIG_RHOUR_MASK = 0x00000400,
    RTC_TRIG_RHOUR_POS = 10,
    RTC_TRIG_RMIN_MASK = 0x00000200,
    RTC_TRIG_RMIN_POS = 9,
    RTC_TRIG_RSEC_MASK = 0x00000100,
    RTC_TRIG_RSEC_POS = 8,
    RTC_TRIG_AMALL_MASK = 0x00000080,
    RTC_TRIG_AMALL_POS = 7,
	RTC_TRIG_AYEAR_MASK = 0x00000040,
    RTC_TRIG_AYEAR_POS = 6,
    RTC_TRIG_AMON_MASK = 0x00000020,
    RTC_TRIG_AMON_POS = 5,
    RTC_TRIG_ADATE_MASK = 0x00000010,
    RTC_TRIG_ADAYE_POS = 4,
    RTC_TRIG_AWEEK_MASK = 0x00000008,
    RTC_TRIG_AWEEK_POS = 3,
    RTC_TRIG_AHOUR_MASK = 0x00000004,
    RTC_TRIG_AHOUR_POS = 2,
	RTC_TRIG_AMIN_MASK = 0x00000002,
    RTC_TRIG_AMIN_POS = 1,
	RTC_TRIG_ASEC_MASK = 0x00000001,
    RTC_TRIG_ASEC_POS = 0,
};

enum RTC_REG_IER_FIELD
{
    RTC_IER_WKTM_MASK = 0x00010000,
    RTC_IER_WKTM_POS = 16,
    RTC_IER_F1HZ_MASK = 0x00008000,
    RTC_IER_F1HZ_POS = 15,
	RTC_IER_RYEAR_MASK = 0x00004000,
    RTC_IER_RYEAR_POS = 14,
	RTC_IER_RMON_MASK = 0x00002000,
    RTC_IER_RMON_POS = 13,
	RTC_IER_RDATE_MASK = 0x00001000,
    RTC_IER_RDAYE_POS = 12,
    RTC_IER_RWEEK_MASK = 0x00000800,
    RTC_IER_RWEEK_POS = 11,
    RTC_IER_RHOUR_MASK = 0x00000400,
    RTC_IER_RHOUR_POS = 10,
    RTC_IER_RMIN_MASK = 0x00000200,
    RTC_IER_RMIN_POS = 9,
    RTC_IER_RSEC_MASK = 0x00000100,
    RTC_IER_RSEC_POS = 8,
    RTC_IER_AMALL_MASK = 0x00000080,
    RTC_IER_AMALL_POS = 7,
	RTC_IER_AYEAR_MASK = 0x00000040,
    RTC_IER_AYEAR_POS = 6,
    RTC_IER_AMON_MASK = 0x00000020,
    RTC_IER_AMON_POS = 5,
    RTC_IER_ADATE_MASK = 0x00000010,
    RTC_IER_ADAYE_POS = 4,
    RTC_IER_AWEEK_MASK = 0x00000008,
    RTC_IER_AWEEK_POS = 3,
    RTC_IER_AHOUR_MASK = 0x00000004,
    RTC_IER_AHOUR_POS = 2,
	RTC_IER_AMIN_MASK = 0x00000002,
    RTC_IER_AMIN_POS = 1,
	RTC_IER_ASEC_MASK = 0x00000001,
    RTC_IER_ASEC_POS = 0,
};

enum RTC_REG_IDR_FIELD
{
    RTC_IDR_WKTM_MASK = 0x00010000,
    RTC_IDR_WKTM_POS = 16,
    RTC_IDR_F1HZ_MASK = 0x00008000,
    RTC_IDR_F1HZ_POS = 15,
	RTC_IDR_RYEAR_MASK = 0x00004000,
    RTC_IDR_RYEAR_POS = 14,
	RTC_IDR_RMON_MASK = 0x00002000,
    RTC_IDR_RMON_POS = 13,
	RTC_IDR_RDATE_MASK = 0x00001000,
    RTC_IDR_RDAYE_POS = 12,
    RTC_IDR_RWEEK_MASK = 0x00000800,
    RTC_IDR_RWEEK_POS = 11,
    RTC_IDR_RHOUR_MASK = 0x00000400,
    RTC_IDR_RHOUR_POS = 10,
    RTC_IDR_RMIN_MASK = 0x00000200,
    RTC_IDR_RMIN_POS = 9,
    RTC_IDR_RSEC_MASK = 0x00000100,
    RTC_IDR_RSEC_POS = 8,
    RTC_IDR_AMALL_MASK = 0x00000080,
    RTC_IDR_AMALL_POS = 7,
	RTC_IDR_AYEAR_MASK = 0x00000040,
    RTC_IDR_AYEAR_POS = 6,
    RTC_IDR_AMON_MASK = 0x00000020,
    RTC_IDR_AMON_POS = 5,
    RTC_IDR_ADATE_MASK = 0x00000010,
    RTC_IDR_ADAYE_POS = 4,
    RTC_IDR_AWEEK_MASK = 0x00000008,
    RTC_IDR_AWEEK_POS = 3,
    RTC_IDR_AHOUR_MASK = 0x00000004,
    RTC_IDR_AHOUR_POS = 2,
	RTC_IDR_AMIN_MASK = 0x00000002,
    RTC_IDR_AMIN_POS = 1,
	RTC_IDR_ASEC_MASK = 0x00000001,
    RTC_IDR_ASEC_POS = 0,
};

enum RTC_REG_IVS_FIELD
{
    RTC_IVS_WKTM_MASK = 0x00010000,
    RTC_IVS_WKTM_POS = 16,
    RTC_IVS_F1HZ_MASK = 0x00008000,
    RTC_IVS_F1HZ_POS = 15,
	RTC_IVS_RYEAR_MASK = 0x00004000,
    RTC_IVS_RYEAR_POS = 14,
	RTC_IVS_RMON_MASK = 0x00002000,
    RTC_IVS_RMON_POS = 13,
	RTC_IVS_RDATE_MASK = 0x00001000,
    RTC_IVS_RDAYE_POS = 12,
    RTC_IVS_RWEEK_MASK = 0x00000800,
    RTC_IVS_RWEEK_POS = 11,
    RTC_IVS_RHOUR_MASK = 0x00000400,
    RTC_IVS_RHOUR_POS = 10,
    RTC_IVS_RMIN_MASK = 0x00000200,
    RTC_IVS_RMIN_POS = 9,
    RTC_IVS_RSEC_MASK = 0x00000100,
    RTC_IVS_RSEC_POS = 8,
    RTC_IVS_AMALL_MASK = 0x00000080,
    RTC_IVS_AMALL_POS = 7,
	RTC_IVS_AYEAR_MASK = 0x00000040,
    RTC_IVS_AYEAR_POS = 6,
    RTC_IVS_AMON_MASK = 0x00000020,
    RTC_IVS_AMON_POS = 5,
    RTC_IVS_ADATE_MASK = 0x00000010,
    RTC_IVS_ADAYE_POS = 4,
    RTC_IVS_AWEEK_MASK = 0x00000008,
    RTC_IVS_AWEEK_POS = 3,
    RTC_IVS_AHOUR_MASK = 0x00000004,
    RTC_IVS_AHOUR_POS = 2,
	RTC_IVS_AMIN_MASK = 0x00000002,
    RTC_IVS_AMIN_POS = 1,
	RTC_IVS_ASEC_MASK = 0x00000001,
    RTC_IVS_ASEC_POS = 0,
};

enum RTC_REG_RIF_FIELD
{
    RTC_RIF_WKTM_MASK = 0x00010000,
    RTC_RIF_WKTM_POS = 16,
    RTC_RIF_F1HZ_MASK = 0x00008000,
    RTC_RIF_F1HZ_POS = 15,
	RTC_RIF_RYEAR_MASK = 0x00004000,
    RTC_RIF_RYEAR_POS = 14,
	RTC_RIF_RMON_MASK = 0x00002000,
    RTC_RIF_RMON_POS = 13,
	RTC_RIF_RDATE_MASK = 0x00001000,
    RTC_RIF_RDAYE_POS = 12,
    RTC_RIF_RWEEK_MASK = 0x00000800,
    RTC_RIF_RWEEK_POS = 11,
    RTC_RIF_RHOUR_MASK = 0x00000400,
    RTC_RIF_RHOUR_POS = 10,
    RTC_RIF_RMIN_MASK = 0x00000200,
    RTC_RIF_RMIN_POS = 9,
    RTC_RIF_RSEC_MASK = 0x00000100,
    RTC_RIF_RSEC_POS = 8,
    RTC_RIF_AMALL_MASK = 0x00000080,
    RTC_RIF_AMALL_POS = 7,
	RTC_RIF_AYEAR_MASK = 0x00000040,
    RTC_RIF_AYEAR_POS = 6,
    RTC_RIF_AMON_MASK = 0x00000020,
    RTC_RIF_AMON_POS = 5,
    RTC_RIF_ADATE_MASK = 0x00000010,
    RTC_RIF_ADAYE_POS = 4,
    RTC_RIF_AWEEK_MASK = 0x00000008,
    RTC_RIF_AWEEK_POS = 3,
    RTC_RIF_AHOUR_MASK = 0x00000004,
    RTC_RIF_AHOUR_POS = 2,
	RTC_RIF_AMIN_MASK = 0x00000002,
    RTC_RIF_AMIN_POS = 1,
	RTC_RIF_ASEC_MASK = 0x00000001,
    RTC_RIF_ASEC_POS = 0,
};

enum RTC_REG_IFM_FIELD
{
    RTC_IFM_WKTM_MASK = 0x00010000,
    RTC_IFM_WKTM_POS = 16,
    RTC_IFM_F1HZ_MASK = 0x00008000,
    RTC_IFM_F1HZ_POS = 15,
	RTC_IFM_RYEAR_MASK = 0x00004000,
    RTC_IFM_RYEAR_POS = 14,
	RTC_IFM_RMON_MASK = 0x00002000,
    RTC_IFM_RMON_POS = 13,
	RTC_IFM_RDATE_MASK = 0x00001000,
    RTC_IFM_RDAYE_POS = 12,
    RTC_IFM_RWEEK_MASK = 0x00000800,
    RTC_IFM_RWEEK_POS = 11,
    RTC_IFM_RHOUR_MASK = 0x00000400,
    RTC_IFM_RHOUR_POS = 10,
    RTC_IFM_RMIN_MASK = 0x00000200,
    RTC_IFM_RMIN_POS = 9,
    RTC_IFM_RSEC_MASK = 0x00000100,
    RTC_IFM_RSEC_POS = 8,
    RTC_IFM_AMALL_MASK = 0x00000080,
    RTC_IFM_AMALL_POS = 7,
	RTC_IFM_AYEAR_MASK = 0x00000040,
    RTC_IFM_AYEAR_POS = 6,
    RTC_IFM_AMON_MASK = 0x00000020,
    RTC_IFM_AMON_POS = 5,
    RTC_IFM_ADATE_MASK = 0x00000010,
    RTC_IFM_ADAYE_POS = 4,
    RTC_IFM_AWEEK_MASK = 0x00000008,
    RTC_IFM_AWEEK_POS = 3,
    RTC_IFM_AHOUR_MASK = 0x00000004,
    RTC_IFM_AHOUR_POS = 2,
	RTC_IFM_AMIN_MASK = 0x00000002,
    RTC_IFM_AMIN_POS = 1,
	RTC_IFM_ASEC_MASK = 0x00000001,
    RTC_IFM_ASEC_POS = 0,
};

enum RTC_REG_ICR_FIELD
{
    RTC_ICR_WKTM_MASK = 0x00010000,
    RTC_ICR_WKTM_POS = 16,
    RTC_ICR_F1HZ_MASK = 0x00008000,
    RTC_ICR_F1HZ_POS = 15,
	RTC_ICR_RYEAR_MASK = 0x00004000,
    RTC_ICR_RYEAR_POS = 14,
	RTC_ICR_RMON_MASK = 0x00002000,
    RTC_ICR_RMON_POS = 13,
	RTC_ICR_RDATE_MASK = 0x00001000,
    RTC_ICR_RDAYE_POS = 12,
    RTC_ICR_RWEEK_MASK = 0x00000800,
    RTC_ICR_RWEEK_POS = 11,
    RTC_ICR_RHOUR_MASK = 0x00000400,
    RTC_ICR_RHOUR_POS = 10,
    RTC_ICR_RMIN_MASK = 0x00000200,
    RTC_ICR_RMIN_POS = 9,
    RTC_ICR_RSEC_MASK = 0x00000100,
    RTC_ICR_RSEC_POS = 8,
    RTC_ICR_AMALL_MASK = 0x00000080,
    RTC_ICR_AMALL_POS = 7,
	RTC_ICR_AYEAR_MASK = 0x00000040,
    RTC_ICR_AYEAR_POS = 6,
    RTC_ICR_AMON_MASK = 0x00000020,
    RTC_ICR_AMON_POS = 5,
    RTC_ICR_ADATE_MASK = 0x00000010,
    RTC_ICR_ADAYE_POS = 4,
    RTC_ICR_AWEEK_MASK = 0x00000008,
    RTC_ICR_AWEEK_POS = 3,
    RTC_ICR_AHOUR_MASK = 0x00000004,
    RTC_ICR_AHOUR_POS = 2,
	RTC_ICR_AMIN_MASK = 0x00000002,
    RTC_ICR_AMIN_POS = 1,
	RTC_ICR_ASEC_MASK = 0x00000001,
    RTC_ICR_ASEC_POS = 0,
};

enum RTC_REG_STA_FIELD
{
	RTC_STA_SYNDONE_MASK = 0x00000002,
    RTC_STA_SYNDONE_POS = 1,
	RTC_STA_EMPTY_MASK = 0x00000001,
    RTC_STA_EMPTY_POS = 0,
};

enum RTC_REG_BKEN_FIELD
{
	RTC_BKEN_BKEN_MASK = 0x00000001,
    RTC_BKEN_BKEN_POS = 0,
};


#endif
